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i#3700: Add IR for AArch64's SIMD LD1/ST1 instructions

Merged Assad Hashmi requested to merge i3700-aarch64-simd-ld1-st1 into master

These are the multiple single element structure load/stores from/to one vector register variants:

ST1 { <Vt>.<T> }, [<Xn|SP>]
LD1 { <Vt>.<T> }, [<Xn|SP>]