Created by: YValeri
Modification of the SIMD Macros, creation of the ld1/2/3/4 and st1/2/3/4 Macros, added the opcodes for those instructions, added the missing reg_is_simd function to AArch64.
Created by: YValeri
Modification of the SIMD Macros, creation of the ld1/2/3/4 and st1/2/3/4 Macros, added the opcodes for those instructions, added the missing reg_is_simd function to AArch64.