Incrementally adds to the AVX-512 EVEX decoder. Adds decoding support for EVEX mask. Promotes Intel manual's addressing mode 'B' and 'V' to cover EVEX.vvvv.
Adds an AVX-512 EVEX encoder. Encoder now presets evex_encoded flag if instruction is EVEX.
Adds handling of AVX-512 register extensions in decoder and encoder.
Adds some decode_table enhancements and adds the AVX-512 instructions vmovups, vmovupd, vmovaps, vmovapd.
Adds tests for the EVEX version of vmovups, vmovupd, vmovaps, vmovapd.
Adds AVX-512 operand size type OPSZ_16_vex32_evex64.
The disassembler now prints curly brackets around an EVEX mask operand. It omits the brackets if mask is a scalar.
The function reg_is_extended() now more closely resembles rex.R. It returns true for upper 8 AVX-512 simd registers, e.g. XMM24 - XMM31.
Adds the function instr_is_opmask() that returns true if instruction is a AVX-512 scalar opmask instruction, e.g. kmov, etc.
Adds to previous commit f62a0f46 and renames "vex ext" to "e_vex ext" in decode tables.
Issue: #1312