q and ge flags are not considered "arithmetic" in defines, yet are in flag preservation code
Xref recent CDash failures on ARM (e.g., http://dynamorio.org/CDash/testDetails.php?test=243665&build=21890 after I added drreg_restore_app_aflags() tests to drreg-test in 4afa0bd0.
The problem first shows up on OP_sel:
interp: start_pc = 0xb6f54730
0xb6f54730 fa82 f24c uadd8 %r2 %r12 -> %r2
0xb6f54734 faa4 f28c sel %r4 %r12 -> %r2
0xb6f54738 fa83 f34c uadd8 %r3 %r12 -> %r3
0xb6f5473c faa2 f38c sel %r2 %r12 -> %r3
0xb6f54740 bb4b cbnz $0xb6f54796 %r3
end_pc = 0xb6f54742
after instrumentation:
TAG 0xb6f54730
+0 m4 @0x469a8a7c f8ca 0084 str %r0 -> +0x84(%r10)[4byte]
+4 m4 @0x469a682c f3ef 8000 mrs %cpsr -> %r0
+8 m4 @0x469a8244 f8ca 0080 str %r0 -> +0x80(%r10)[4byte]
+12 m4 @0x469a8e4c f8da 0080 ldr +0x80(%r10)[4byte] -> %r0
+16 m4 @0x469a6748 f380 8c00 msr $0x0c %r0 -> %cpsr
+20 L3 fa82 f24c uadd8 %r2 %r12 -> %r2
+24 m4 @0x469a8a30 f8da 0080 ldr +0x80(%r10)[4byte] -> %r0
+28 m4 @0x469a84c8 f380 8c00 msr $0x0c %r0 -> %cpsr
+32 L3 faa4 f28c sel %r4 %r12 -> %r2
+36 L3 fa83 f34c uadd8 %r3 %r12 -> %r3
+40 L3 faa2 f38c sel %r2 %r12 -> %r3
+44 m4 @0x469a89e4 f8da 0080 ldr +0x80(%r10)[4byte] -> %r0
+48 m4 @0x469a8c44 f380 8c00 msr $0x0c %r0 -> %cpsr
+52 m4 @0x469a81ac f8da 0084 ldr +0x84(%r10)[4byte] -> %r0
+56 L3 bb4b cbnz $0xb6f54796 %r3
END 0xb6f54730
{OP_uadd8, 0xfa80f040, "uadd8", RCw, xx, RAw, RDw, xx, no, fWGE, END_LIST},
{OP_sel, 0xfaa0f080, "sel", RCw, xx, RAw, RDw, xx, no, fRGE, END_LIST},
Looks like we don't update the stored app aflags after the app write OP_uadd8.
It's b/c DR considers only nzcv to be the "arithmetic" flags on ARM in EFLAGS_WRITE_ARITH. Yet dr_restore_arith_flags_from_reg() uses apsr_nzcvqg, so we're clobbering GE.
Unless someone remembers a reason to not include qg in "arith", that seems to be the fix. My notes don't seem to have an explicit decision to exclude them.